B.TECH. IN ELECTRONICS ENGINEERING (VLSI DESIGN AND TECHNOLOGY)electivetheory
FPGA BASED SYSTEM DESIGN USING VERILOG
ECE 2229
Syllabus
- 01Verilog HDL Coding Style: Lexical Conventions - Ports and Modules – Operators - Gate Level Modeling - System Tasks & Compiler Directives - Test Bench - Data Flow Modeling - Behavioral level Modeling - Tasks & Functions
- 02Overview of FPGA Architectures and Technologies: FPGA Architectural options, coarse vs fine grained, vendor specific issues (emphasis on Xilinx FPGA), Antifuse, SRAM and EPROM based FPGAs, FPGA logic cells, interconnection network and I/O Pad
- 03Verilog Modelling of Combinational and Sequential Circuits: Behavioral, Data Flow and Structural Realization – Adders – Multipliers- Comparators - Flip Flops - Realization of Shift Register - Realization of a Counter- Synchronous and Asynchronous FIFO –Single port and Dual port RAM – Pseudo Random LFSR – Cyclic Redundancy Check
- 04Synchronous Sequential Circuit: State diagram-state table –state assignment-choice of flipflops – Timing diagram –One hot encoding Mealy and Moore state machines – Design of serial adder using Mealy and Moore state machines - State minimization – Sequence detection- Design examples: Sequence detector, Serial adder, Vending machine using One Hot Controller
- 05System Design Examples using Xillinx FPGAs – Traffic light Controller, Real Time Clock
- 06Self-directed Learning : FIFO –Single port and Dual port RAM – Pseudo Random LFSR – Cyclic Redundancy Check
References
- M.J.S. Smith, “Application Specific Integrated Circuits”, Pearson, 2000
- Peter Ashenden, “Digital Design using Verilog”, Elsevier, 2007
- W. Wolf, “FPGA based system design”, Pearson, 2004
- Clive Maxfield, “The Design Warriors’s Guide to FPGAs”, Elsevier, 2004
- Samir Palnitkar, “Verilog HDL: A Guide to Digital Design and Synthesis” Prentice Hall, Second Edition, 2003
- Wayne Wolf, “FPGA Based System Design”, Prentices Hall Modern Semiconductor Design Series
Credits Structure
3Lecture
0Tutorial
0Practical
3Total